Micro Mapper Madness Specs v0.11 ** PRELIMINARY ** WILL BE REVISED ** To be supported in Squeedo: The Flash Cart. Microprocessor: PIC18F452 @ 40Mhz Register area: $5000-$501F one latch for writing, one latch for reading address is latched seperately during R/W Regs mirrored: $501F-$5FFF SRAM: $6000-$7FFF 4 pages PRG-ROM: $8000-$FFFF 4 - 32 pages CHR-RAM: (PPU)$0000-$1FFF 4 pages CHR-RAM: (PPU)$2000-$2FFF fixed 4KB page for nametables $5000 - Program ROM Page Select (W) D0-D4 Select 32KB page (128KB through 1024KB supported) $5001 - Program RAM Page Select (W) D0-D1 Select 8KB page (32KB optional) $5002 - Character RAM Page Select (W) D0-D1 Select 8KB page (32KB standard) $5003 - NMI Acknowledge (W) Dx Value written is ignored, write this reg to sync the mapper to the NES's vertical vblank for PPU-IRQ usage. If this register is not written, the IRQ will be free-running. $5004 - IRQ Acknowledge (W) Dx Value written is ignored, write this reg to clear the NES IRQ. $5005 - IRQ Source Select (W) D0 Enable PPU-based IRQ D1 Enable CPU-based IRQ D2 Enable UART IRQ for byte received D3 Enable UART IRQ for byte sent D4 Enable Automatic CHR-RAM Page Select Resets to first page upon Vblank signal, subsequent timer IRQs will cycle to the next page without generating an IRQ on the NES. Controlled by PPU-based IRQ only. (R) D0 PPU-based IRQ Active D1 CPU-based IRQ Active D2 UART Byte Received D3 UART Byte Sent $5006 - IRQ CPU Cycle Count Low (W) D0-D7 Low byte of CPU cycle counter Put 16-bit value to cycle counter $5007 - IRQ CPU Cycle Count High (W) D0-D7 High byte of CPU cycle counter $5008 - IRQ PPU Scanline Count (W) D0-D7 Scanline counter Put 8-bit value to counter $5009 - PPU Vertical Scroll D0-D7 Scroll value for current frame $500B - UART Data (W) D0-D7 Byte to send (R) D0-D7 Byte received $500C - EEPROM Address (W) D0-D7 Address in data EEPROM (64 bytes standard, 256 dev version) $500D - EEPROM Data I/O (RW) D0-D7 EEPROM Data $500E - Multiply Low (W) D0-D7 8-bit value to multiply (R) D0-D7 Low byte of result $500F - Multiply High (W) D0-D7 8-bit value to multiply Begin Multiplication (R) D0-D7 High byte of result Clear Result $5010 - Wave Address Lo $5011 - Wave Address High $5012 - Wave Data (auto post-increment) $5013 - Control Channel Select $5014 - Control Volume $5015 - Control Freq Fine $5016 - Control Freq $5017 - Control Freq Coarse $5018 - $501B - user command $501C - user data $501D - user data $501E - user data $501F - user data Update Firmware D7 Enable Bootloader Code Connect cartridge to serial adapter to update the PIC's flash memory. In the development version, this routine will run automatically during every start-up (and time out if a serial signal is not received). PIC to NES Communications IRQ Signals $02 - byte for reception $04 - next byte requested $06 - CPU IRQ $08 - PPU IRQ Programmable Interrupt Scheduling System (PISS) How to use: select CPU cycle or scanline counting mode upload interrupt program store current vertical scroll value to cart register (same format as PPU's $2005 reg) read NMI acknowledge register In scanline mode, the screen is considered 512 scanlines tall program data format is number of scanlines to delay before IRQ (special = '0', waits 256 lines and triggers no IRQ) For example, if we have the following program loaded: 00,16,32,16,16,32,64, .. ^. ^1 ^2 ^3 ^4 ^5 ^6 Vertical scroll value = zero nametable config (NT0 & NT2) *-----------------------* |.......................| |.......................| |.......................| |.......................| |.......................| |.......................| |.......................| |.......................| NT2 |.......................| |.......................| |.......................| |.......................| |.......................| |.......................| |.......................| |.......................| *-----------------------* |11111111111111111111111| |22222222222222222222222| |22222222222222222222222| |33333333333333333333333| |44444444444444444444444| |55555555555555555555555| |55555555555555555555555| |66666666666666666666666| NT0 |66666666666666666666666| |66666666666666666666666| |66666666666666666666666| | | | | | | | | | | *-----------------------*